000 01011nam a2200157Ia 4500
008 140211s9999 xx 000 0 und d
020 _a9783540390978
100 _aVounckx, Johan.
245 _aIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
245 _b16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006. Proceedings /
245 _cedited by Johan Vounckx, Nadine Azemard, Philippe Maurine.
300 _aOn-campus e-Book by Springer under Digital Library Program of Higher Education Commission (HEC) of Pakistan
650 _aComputer science.; Memory management (Computer science).; Logic design.; Computer system performance.; Systems engineering.; Computer Science.; Logic Design.; Processor Architectures.; System Performance and Evaluation.; Arithmetic and Logic Structures.; Memory Structures.; Circuits and Systems.
856 4 1 _3Click her to access the e-Book
_uhttp://dx.doi.org/10.1007/11847083
942 _cEB
999 _c112696
_d112696